Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Indirect VLIW memory allocation for the ManArray multiprocessor DSP."

Nikos Pitsianis, Gerald G. Pechanek (2003)

> Home

Details and statistics

DOI: 10.1145/773365.773373

access: closed

type: Journal Article

metadata version: 2020-07-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/sigarch/PitsianisP03
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/sigarch/PitsianisP03
Nikos Pitsianis, Gerald G. Pechanek:
Indirect VLIW memory allocation for the ManArray multiprocessor DSP. SIGARCH Comput. Archit. News 31(1): 69-74 (2003)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.