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ORCID"Three Dimensional FPGA Architecture with Fewer TSVs."
Motoki Amagasaki et al. (2018)
- Motoki Amagasaki, Masato Ikebe, Qian Zhao, Masahiro Iida, Toshinori Sueyoshi:
Three Dimensional FPGA Architecture with Fewer TSVs. IEICE Trans. Inf. Syst. 101-D(2): 278-287 (2018)
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