"A High-Speed Link Layer Architecture for Low Latency and Memory Cost ..."

Jaesung Lee, Hyuk-Jae Lee, Chanho Lee (2007)

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DOI: 10.1093/COMJNL/BXM032

access: closed

type: Journal Article

metadata version: 2017-05-20

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Jaesung Lee, Hyuk-Jae Lee, Chanho Lee:
A High-Speed Link Layer Architecture for Low Latency and Memory Cost Reduction. Comput. J. 50(5): 616-628 (2007)

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