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"Optimized ASIC/FPGA Design Flow for Energy Efficient Network Nodes."
Hans Sahm et al. (2013)
- Hans Sahm, Matthias Sauppe, Erik Markert, Thomas Horn, Ulrich Heinkel, Klaus-Holger Otto:
Optimized ASIC/FPGA Design Flow for Energy Efficient Network Nodes. Bell Labs Tech. J. 18(3): 195-209 (2013)
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