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"Yield Analysis of Logic Circuits."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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Davide Appello et al. (2004)

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DOI: 10.1109/VTEST.2004.1299232

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Davide Appello, Alessandra Fudoli, Katia Giarda, Emil Gizdarski, Ben Mathew, Vincenzo Tancorre:
Yield Analysis of Logic Circuits. VTS 2004: 103-108

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last updated on 2023-03-24 00:04 CET by the dblp team

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