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"System Design of ATSC3.0 Broadcast Gateway Based on CPU-FPGA."

Jianhao Ding et al. (2018)

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DOI: 10.1109/VTCFALL.2018.8690800

access: closed

type: Conference or Workshop Paper

metadata version: 2021-12-20

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  dblp key:
  - conf/vtc/DingXLHZW18
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  persistent URL:
  - https://dblp.org/rec/conf/vtc/DingXLHZW18
Jianhao Ding, Shuai Xiong, Yifan Liu, Dazhi He, Wenjun Zhang, Kaikai Wang:
System Design of ATSC3.0 Broadcast Gateway Based on CPU-FPGA. VTC Fall 2018: 1-5

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