"Verification of a Combinational Loop Based Arbitration Scheme in a ..."

Yang Xia, Pranav Ashar (2000)

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DOI: 10.1109/ICVD.2000.812648

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Yang Xia, Pranav Ashar:
Verification of a Combinational Loop Based Arbitration Scheme in a System-On-Chip Integration Architecture. VLSI Design 2000: 449-

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