Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Simulated Annealing Based Parallel State Assignment of Finite State Machines."

Gagan Hasteer, Prithviraj Banerjee (1997)

> Home

Details and statistics

DOI: 10.1109/ICVD.1997.567963

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/vlsid/HasteerB97
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsid/HasteerB97
Gagan Hasteer, Prithviraj Banerjee:
Simulated Annealing Based Parallel State Assignment of Finite State Machines. VLSI Design 1997: 69-75

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.