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"A New Device Level Digital Simulator for Simulation and Functional ..."

Tathagato Rai Dastidar, Partha Ray (2006)

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DOI: 10.1109/VLSID.2006.19

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/vlsid/DastidarR06
Tathagato Rai Dastidar, Partha Ray:
A New Device Level Digital Simulator for Simulation and Functional Verification of Large Semiconductor Memories. VLSI Design 2006: 155-160

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