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"3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized ..."

Hugh Mair et al. (2017)

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DOI: 10.1109/ISSCC.2017.7870258

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Hugh Mair, Ericbill Wang, Alice Wang, Ping Kao, Yuwen Tsai, Sumanth Gururajarao, Rolf Lagerquist, Jin Son, Gordon Gammie, Gordon Lin, Achuta Thippana, Kent Li, Manzur Rahman, Wuan Kuo, David Yen, Yi-Chang Zhuang, Ue Fu, Hung-Wei Wang, Mark Peng, Cheng-Yuh Wu, Taner Dosluoglu, Anatoly Gelman, Daniel Dia, Girishankar Gurumurthy, Tony Hsieh, W. X. Lin, Ray Tzeng, Jengding Wu, C. H. Wang, Uming Ko:
3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance. ISSCC 2017: 56-57

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