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"Transistor level micro-placement and routing for two-dimensional digital ..."

Michael A. Riepe, Karem A. Sakallah (1999)

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DOI: 10.1145/299996.300028

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/ispd/RiepeS99
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Michael A. Riepe, Karem A. Sakallah:
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis. ISPD 1999: 74-81

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