"Clocking scheme selection for circuits made up of a controller and a datapath."

C. Safina, Régis Leveugle (1992)

> Home

Details and statistics

DOI: —

access: unavailable

type: Conference or Workshop Paper

metadata version: 2003-02-03

- no documents available
- export record
  dblp key:
  - conf/ifip10-2/SafinaL92
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ifip10-2/SafinaL92
C. Safina, Régis Leveugle:
Clocking scheme selection for circuits made up of a controller and a datapath. Synthesis for Control Dominated Circuits 1992: 293-308

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.