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"Design technology co-optimization for enabling 5nm gate-all-around ..."

Trong Huynh Bao et al. (2015)

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DOI: 10.1109/ICICDT.2015.7165874

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-15

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  - conf/icicdt/BaoSRYMVTW15
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Trong Huynh Bao, Sushil Sakhare, Julien Ryckaert, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq:
Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM. ICICDT 2015: 1-4

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