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"Design Flow of Accelerating Hybrid Extremely Low Bit-Width Neural Network ..."
Junsong Wang et al. (2018)
- Junsong Wang, Qiuwen Lou, Xiaofan Zhang, Chao Zhu, Yonghua Lin, Deming Chen:
Design Flow of Accelerating Hybrid Extremely Low Bit-Width Neural Network in Embedded FPGA. FPL 2018: 163-169
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