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"A four-bit full adder implemented on fast SiGe FPGAs with novel power ..."

Kuan Zhou et al. (2003)

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DOI: 10.1145/611817.611883

access: closed

type: Conference or Workshop Paper

metadata version: 2024-02-29

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  dblp key:
  - conf/fpga/ZhouCYGCMMKG03
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  - https://dblp.org/rec/conf/fpga/ZhouCYGCMMKG03
Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda:
A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme. FPGA 2003: 248

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