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"Measuring and modeling FPGA clock variability."

N. Pete Sedcole, Justin S. J. Wong, Peter Y. K. Cheung (2008)

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DOI: 10.1145/1344671.1344713

access: closed

type: Conference or Workshop Paper

metadata version: 2019-04-03

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  - conf/fpga/SedcoleWC08
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N. Pete Sedcole, Justin S. J. Wong, Peter Y. K. Cheung:
Measuring and modeling FPGA clock variability. FPGA 2008: 258

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