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"Demonstrating an FPGA implementation of a full HD real-time HEVC decoder ..."

Benno Stabernack et al. (2015)

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DOI: 10.1109/DASIP.2015.7367247

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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  - conf/dasip/StabernackMHB15
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Benno Stabernack, Jan Moller, Jan Hahlbeck, Jens Brandenburg:
Demonstrating an FPGA implementation of a full HD real-time HEVC decoder with memory optimizations for range extensions support. DASIP 2015: 1-2

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