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"Performance-preserved analog routing methodology via wire load reduction."

Hao-Yu Chi et al. (2018)

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DOI: 10.1109/ASPDAC.2018.8297370

access: closed

type: Conference or Workshop Paper

metadata version: 2018-04-09

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  dblp key:
  - conf/aspdac/ChiTLC18
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  persistent URL:
  - https://dblp.org/rec/conf/aspdac/ChiTLC18
Hao-Yu Chi, Hwa-Yi Tseng, Chien-Nan Jimmy Liu, Hung-Ming Chen:
Performance-preserved analog routing methodology via wire load reduction. ASP-DAC 2018: 482-487

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