"A low power 10-bit 100-MS/s SAR ADC in 65nm CMOS."

Jun Ma et al. (2011)

Details and statistics

DOI: 10.1109/ASICON.2011.6157227

access: closed

type: Conference or Workshop Paper

metadata version: 2018-01-17

a service of  Schloss Dagstuhl - Leibniz Center for Informatics