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ORCID"A Reference-Sampling PLL with Low-Ripple Double-Sampling PD Achieving ..."
Zunsong Yang et al. (2023)
- Zunsong Yang
, Masaru Osada, Shuowei Li, Yuyang Zhu, Tetsuya Iizuka:
A Reference-Sampling PLL with Low-Ripple Double-Sampling PD Achieving -80-dBc Reference Spur and -259-dB FoM with 12-pF Input Load. VLSI Technology and Circuits 2023: 1-2
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last updated on 2023-09-30 09:58 CEST by the dblp team
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