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"Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read ..."

Kailiang Huang et al. (2022)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830271

access: closed

type: Conference or Workshop Paper

metadata version: 2023-01-05

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Kailiang Huang, Xinlv Duan, Junxiao Feng, Ying Sun, Congyan Lu, Chuanke Chen, Guangfan Jiao, Xinpeng Lin, Jinhai Shao, Shihui Yin, Jiazhen Sheng, Zhaogui Wang, Wenqiang Zhang, Xichen Chuai, Jiebin Niu, Wenwu Wang, Ying Wu, Weiliang Jing, Zhengbo Wang, Jeffrey Xu, Guanhua Yang, Di Geng, Ling Li, Ming Liu:
Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read Current of 32.8 μA/μm (Vth + 1 V), Well-performed Thermal Stability up to 120 ℃ for Low Latency, High-density 2T0C 3D DRAM Application. VLSI Technology and Circuits 2022: 296-297

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