"Synthesizable RAM-Alternative to Low Configuration Compiler Memory for Die ..."

B. Suresh, Biswadeep Chaterjee, R. Harinath (2000)

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DOI: 10.1109/ICVD.2000.812659

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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B. Suresh, Biswadeep Chaterjee, R. Harinath:
Synthesizable RAM-Alternative to Low Configuration Compiler Memory for Die Area Reduction. VLSI Design 2000: 512-517

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