Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"An ILP Formulation for System Level Throughput and Power Optimization in ..."

Krishnan Srinivasan, Karam S. Chatha (2004)

> Home

Details and statistics

DOI: 10.1109/ICVD.2004.1260933

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/vlsid/SrinivasanC04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsid/SrinivasanC04
Krishnan Srinivasan, Karam S. Chatha:
An ILP Formulation for System Level Throughput and Power Optimization in Multiprocessor SoC Architectures. VLSI Design 2004: 255-260

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.