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"A Novel Low Power Error Detection Logic for Inexact Leading Zero ..."

B. Naveen Kumar Reddy et al. (2014)

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DOI: 10.1109/VLSID.2014.29

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/vlsid/ReddySVS14
B. Naveen Kumar Reddy, M. Chandra Sekhar, Sreehari Veeramachaneni, M. B. Srinivas:
A Novel Low Power Error Detection Logic for Inexact Leading Zero Anticipator in Floating Point Units. VLSID 2014: 128-132

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