"Test Time Reduction to Test for Path-Delay Faults using Enhanced ..."

Kim T. Le, Dong Hyun Baik, Kewal K. Saluja (2007)

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DOI: 10.1109/VLSID.2007.156

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Kim T. Le, Dong Hyun Baik, Kewal K. Saluja:
Test Time Reduction to Test for Path-Delay Faults using Enhanced Random-Access Scan. VLSI Design 2007: 769-774

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