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"A High-Performance VLSI Architecture for Advanced Encryption Standard ..."

Naga M. Kosaraju, Murali R. Varanasi, Saraju P. Mohanty (2006)

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DOI: 10.1109/VLSID.2006.9

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Naga M. Kosaraju, Murali R. Varanasi, Saraju P. Mohanty:
A High-Performance VLSI Architecture for Advanced Encryption Standard (AES) Algorithm. VLSI Design 2006: 481-484

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