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"A Parallel VLSI Architecture for Layered Decoding for Array LDPC Codes."
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary (2007)
- Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary:
A Parallel VLSI Architecture for Layered Decoding for Array LDPC Codes. VLSI Design 2007: 738-743
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