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"TWTXBB: A Low Latency, High Throughput Multiplier Architecture Using a New ..."
Debabrata Ghosh, S. K. Nandy, K. Parthasarathy (1994)
- Debabrata Ghosh, S. K. Nandy, K. Parthasarathy:
TWTXBB: A Low Latency, High Throughput Multiplier Architecture Using a New 4 --> 2 Compressor. VLSI Design 1994: 77-82
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