"An Efficient Hybrid Heuristic for the Gate Matrix Layout Problem in VLSI ..."

Tanuj Bagchi, Sajal K. Das (1994)

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DOI: 10.1109/ICVD.1994.282686

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Tanuj Bagchi, Sajal K. Das:
An Efficient Hybrid Heuristic for the Gate Matrix Layout Problem in VLSI Design. VLSI Design 1994: 207-210

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