"Enhancing SAT-based Bounded Model Checking using Sequential Logic ..."

Rajat Arora, Michael S. Hsiao (2004)

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DOI: 10.1109/ICVD.2004.1261028

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Rajat Arora, Michael S. Hsiao:
Enhancing SAT-based Bounded Model Checking using Sequential Logic Implications. VLSI Design 2004: 784-787

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