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"A 29% PAE 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated ..."

Yuncheng Zhang et al. (2020)

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DOI: 10.1109/VLSICIRCUITS18222.2020.9162955

access: closed

type: Conference or Workshop Paper

metadata version: 2021-04-09

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  dblp key:
  - conf/vlsic/ZhangLGWYQWPSO20
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  - https://dblp.org/rec/conf/vlsic/ZhangLGWYQWPSO20
Yuncheng Zhang, Bangan Liu, Xiaofan Gu, Chun Wang, Kiyoshi Yanagisawa, Junjun Qiu, Yun Wang, Jian Pang, Atsushi Shirane, Kenichi Okada:
A 29% PAE 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated Injection-Locked PLL. VLSI Circuits 2020: 1-2

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