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"A 125 mW 8.5-11.5 Gb/s serial link transceiver with a dual path 6-bit ..."

Bharath Raghavan et al. (2016)

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DOI: 10.1109/VLSIC.2016.7573521

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-21

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  - https://dblp.org/rec/conf/vlsic/RaghavanVRPYHCK16
Bharath Raghavan, Aida Varzaghani, Lakshmi P. Rao, Henry Park, Xiaochen Yang, Zhi Huang, Yu Chen, Rama Kattamuri, Chunhui Wu, Bo Zhang, Jun Cao, Afshin Momtaz, Namik Kocaman:
A 125 mW 8.5-11.5 Gb/s serial link transceiver with a dual path 6-bit ADC/5-tap DFE receiver and a 4-tap FFE transmitter in 28 nm CMOS. VLSI Circuits 2016: 1-2

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