"A 114-pW PMOS-only, trim-free voltage reference with 0.26% within-wafer ..."

Qing Dong et al. (2016)

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DOI: 10.1109/VLSIC.2016.7573494

access: closed

type: Conference or Workshop Paper

metadata version: 2021-11-02

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Qing Dong, Kaiyuan Yang, David T. Blaauw, Dennis Sylvester:
A 114-pW PMOS-only, trim-free voltage reference with 0.26% within-wafer inaccuracy for nW systems. VLSI Circuits 2016: 1-2

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