"A 3.8mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure."

Chi-Hang Chan et al. (2012)

> Home

Details and statistics

DOI: 10.1109/VLSIC.2012.6243802

access: closed

type: Conference or Workshop Paper

metadata version: 2020-12-29

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsic/Chan0SUM12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsic/Chan0SUM12
Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A 3.8mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure. VLSIC 2012: 86-87

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.