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"A 400mV active VMIN, 200mV retention VMIN, 2.8 GHz 64Kb SRAM with a 0.09 ..."

Azeez Bhavnagarwala et al. (2016)

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DOI: 10.1109/VLSIC.2016.7573513

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Azeez Bhavnagarwala, Imran Iqbal, An Nguyen, David Ondricek, Vikas Chandra, Robert C. Aitken:
A 400mV active VMIN, 200mV retention VMIN, 2.8 GHz 64Kb SRAM with a 0.09 um² 6T bitcell in a 16nm FinFET CMOS process. VLSI Circuits 2016: 1-2

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