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"A passive equalizer and its design methodology for global interconnects in ..."

Moritoshi Yasunaga, Naoki Yokoshima, Ikuo Yoshihara (2016)

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DOI: 10.1109/VLSI-SOC.2016.7753552

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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  - conf/vlsi/YasunagaYY16
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Moritoshi Yasunaga, Naoki Yokoshima, Ikuo Yoshihara:
A passive equalizer and its design methodology for global interconnects in VLSIs. VLSI-SoC 2016: 1-6

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