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"3D Logic Cells Design and Results Based on Vertical NWFET Technology ..."

Arnaud Poittevin et al. (2020)

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DOI: 10.1007/978-3-030-81641-4_14

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Arnaud Poittevin, Chhandak Mukherjee, Ian O'Connor, Cristell Maneux, Guilhem Larrieu, Marina Deng, Sébastien Le Beux, François Marc, Aurélie Lecestre, Cédric Marchand, Abhishek Kumar:
3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model. VLSI-SoC (Selected Papers) 2020: 301-321

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