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"A 65 nm CMOS Synthesizable Digital Low-Dropout Regulator Based on ..."

Naoki Ojima et al. (2018)

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DOI: 10.1007/978-3-030-23425-6_1

access: closed

type: Conference or Workshop Paper

metadata version: 2019-06-26

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Naoki Ojima, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada:
A 65 nm CMOS Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion with 99.6% Current Efficiency at 10-mA Load. VLSI-SoC (Selected Papers) 2018: 1-13

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