BibTeX record conf/vlsi/DepraB09

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@inproceedings{DBLP:conf/vlsi/DepraB09,
  author    = {Dieison Antonello Depr{\'{a}} and
               Sergio Bampi},
  editor    = {J{\"{u}}rgen Becker and
               Marcelo O. Johann and
               Ricardo Reis},
  title     = {Techniques for Architecture Design for Binary Arithmetic Decoder Engines
               Based on Bitstream Flow Analysis},
  booktitle = {VLSI-SoC: Technologies for Systems Integration - 17th {IFIP} {WG}
               10.5/IEEE International Conference on Very Large Scale Integration,
               VLSI-SoC 2009, Florian{\'{o}}polis, Brazil, October 12-14, 2009,
               Revised Selected Papers},
  series    = {{IFIP} Advances in Information and Communication Technology},
  volume    = {360},
  pages     = {181--197},
  publisher = {Springer},
  year      = {2009},
  url       = {https://doi.org/10.1007/978-3-642-23120-9\_10},
  doi       = {10.1007/978-3-642-23120-9\_10},
  timestamp = {Tue, 22 Oct 2019 15:21:19 +0200},
  biburl    = {https://dblp.org/rec/conf/vlsi/DepraB09.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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