"A 14-bit 200MS/s current-steering DAC achieving over 82dB SFDR with ..."

Jen-Huan Tsai et al. (2012)

> Home

Details and statistics

DOI: 10.1109/VLSI-DAT.2012.6212594

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsi-dat/TsaiCLSH12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsi-dat/TsaiCLSH12
Jen-Huan Tsai, Yen-Ju Chen, Yan-Fong Lai, Meng-Hung Shen, Po-Chiun Huang:
A 14-bit 200MS/s current-steering DAC achieving over 82dB SFDR with digitally-assisted calibration and dynamic matching techniques. VLSI-DAT 2012: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.