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"Design of 2xVDD-Tolerant Power-Rail ESD Clamp Circuit Against False ..."

Han-Sheng Huang, Ming-Dou Ker (2021)

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DOI: 10.1109/VLSI-DAT52063.2021.9427327

access: closed

type: Conference or Workshop Paper

metadata version: 2021-05-17

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Han-Sheng Huang, Ming-Dou Ker:
Design of 2xVDD-Tolerant Power-Rail ESD Clamp Circuit Against False Trigger During Fast Power-ON Events. VLSI-DAT 2021: 1-4

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