"Two-staged parallel layer-aware partitioning for 3D designs."

Yi-Hang Chen, Yi-Ting Chen, Juinn-Dar Huang (2014)

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DOI: 10.1109/VLSI-DAT.2014.6834861

access: closed

type: Conference or Workshop Paper

metadata version: 2020-06-15

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Yi-Hang Chen, Yi-Ting Chen, Juinn-Dar Huang:
Two-staged parallel layer-aware partitioning for 3D designs. VLSI-DAT 2014: 1-4

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