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"Generating hardware and software for RISC-V cores generated with Rocket ..."

Süleyman Savas, Endri Bezati, Jörn W. Janneck (2021)

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DOI: 10.1109/SOCC52499.2021.9739411

access: closed

type: Conference or Workshop Paper

metadata version: 2022-03-30

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Süleyman Savas, Endri Bezati, Jörn W. Janneck:
Generating hardware and software for RISC-V cores generated with Rocket Chip generator. SoCC 2021: 89-94

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