"Low-power high-speed on-chip asynchronous Wave-pipelined CML SerDes."

Ashok Jaiswal et al. (2014)

> Home

Details and statistics

DOI: 10.1109/SOCC.2014.6948891

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/socc/JaiswalwFH14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/socc/JaiswalwFH14
Ashok Jaiswal, Dominik walk, Yuan Fang, Klaus Hofmann:
Low-power high-speed on-chip asynchronous Wave-pipelined CML SerDes. SoCC 2014: 5-10

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.