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"Variation-aware core-level redundancy scheme for reliable DSP computation ..."

Wei-Ching Chu et al. (2015)

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DOI: 10.1109/SIPS.2015.7345008

access: closed

type: Conference or Workshop Paper

metadata version: 2019-09-16

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  - conf/sips/ChuLCW15
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Wei-Ching Chu, Huai-Ting Li, Ching-Yao Chou, An-Yeu Andy Wu:
Variation-aware core-level redundancy scheme for reliable DSP computation in multi-core systems. SiPS 2015: 1-5

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