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"FPGA hardware in the loop system for ERTMS-ETCS train equipment testing."

Naim Harb et al. (2016)

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DOI: 10.1109/SIES.2016.7509412

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-03

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  dblp key:
  - conf/sies/HarbVPG16
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Naim Harb, Carlos Valderrama, Esteban Pelaez, Alexandre Girardi:
FPGA hardware in the loop system for ERTMS-ETCS train equipment testing. SIES 2016: 55-62

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