"An FPGA-in-the-loop approach for HDL motor controller verification."

Paul Rogers, Rajesh Kavasseri, Scott C. Smith (2017)

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DOI: 10.1109/RECONFIG.2017.8279774

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-25

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Paul Rogers, Rajesh Kavasseri, Scott C. Smith:
An FPGA-in-the-loop approach for HDL motor controller verification. ReConFig 2017: 1-6

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