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"An FPGA arithmetic logic unit for computing scalar multiplication using ..."
Sabel Mercurio Hernández Rodríguez, Francisco Rodríguez-Henríquez (2005)
- Sabel Mercurio Hernández Rodríguez, Francisco Rodríguez-Henríquez:
An FPGA arithmetic logic unit for computing scalar multiplication using the half-and-add method. ReConFig 2005
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