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"FPGA implementation of a synchronous and self-timed neuroprocessor."

Juan José Raygoza-Panduro, Susana Ortega-Cisneros, Eduardo I. Boemo (2005)

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DOI: 10.1109/RECONFIG.2005.17

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  dblp key:
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  - https://dblp.org/rec/conf/reconfig/Raygoza-PanduroOB05
Juan José Raygoza-Panduro, Susana Ortega-Cisneros, Eduardo I. Boemo:
FPGA implementation of a synchronous and self-timed neuroprocessor. ReConFig 2005

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