"A VLSI Systolic Array Architecture for Computation of Third-Order ..."

Ziad H. Mussallam, Rana Ejaz Ahmed, Saleh A. Alshebeili (2000)

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DOI: 10.1109/PCEE.2000.873616

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Ziad H. Mussallam, Rana Ejaz Ahmed, Saleh A. Alshebeili:
A VLSI Systolic Array Architecture for Computation of Third-Order Cumulants for Two-Dimensional Signals. PARELEC 2000: 134-138

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